Computaverse

The Theory of Digital Cosmology

by Mike Hahn

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Our universe is nothing but a string of ones and zeros. Its length is unimportant, just so long as it is long enough (and powerful enough) to encompass our physical universe, which is actually a computer simulation. In this document I will assume that it is exactly 2 raised to the power of 65,536, where 65,536 = 2 ^ (2 ^ (2 ^ 2)), and the caret (^) operator means "raised to the power of". This enormous string of bits (a bit is either one or zero) is divided into 4 parts: 1) the main loop; 2) the master tape; 3) the registers, whose length equals some small multiple of 65,536; and 4) the main section, which houses the computer simulation that simulates our physical universe.

The main loop contains hundreds of 4-bit instructions which control the primary Turing machine, and the tape of that Turing machine is contained in the master tape. The primary Turing machine controls the secondary Turing machine, whose tapes consist of the main/register sections. Computaverse is my attempt to explain how we came to be, by assuming that the primary Turing machine and a very large amount of data is all that is needed to create a universe.

Master Tape

The master tape is the data used by the primary Turing machine. A Turing machine operates on a (potentially) infinitely long tape, and on that tape are ones and zeros. It can only do 6 things: move its tape reading head left or right, write a one on the current bit on its tape, write a zero, read the current bit and use that information in some way, and halt. A famous mathematician named Alan Turing proved that all digital computers can be simulated by a Turing machine, meaning that all digital computers are essentially equivalent.

The master tape encodes a dual-plane grid of logic gates (all NAND gates: if both inputs are ones, output is zero, otherwise output is one), wires (grid lines) connecting those logic gates, and splitters (grid intersections with one incoming wire and 2 outgoing wires. This dual-plane grid actually simulates a piece of computer hardware (a CPU with its own memory). This "computer" (which is a physical Turing machine with 2 tapes) operates on the data in the register and main sections.

The word size of this "computer" is 3 bits. There are 8 different instructions: move left, move right, write zero, write one, jump (followed by a 24-bit relative destination address), skip 9 words if zero, skip 9 words if one, and toggle current tape. The skip commands read a bit from the current tape. When the toggle tape command is executed, the current tape reader switches from the tape reader in the register section to the tape reader in the main section, or vice versa.

The first 4 grid intersections at the beginning of the top row on the lower-order plane have special meaning. The first of those 4 special grid intersections is a simple grid intersection which has one active output wire and one "implied" input wire. Its state is either an active zero or an active one whenever the read command is transmitted. The next 3 special grid intersections are all simple grid intersections which have one active input wire and one "implied" output wire. The 2nd special grid intersection is an active zero whenever the read command is executed (read a bit from the current tape in the Turing machine), and an active one whenever the toggle tape command is executed. The 3rd special grid intersection is an active zero whenever the "write zero" command is executed, and an active one whenever the "write one" command is executed. The 4th special grid intersection is an active zero whenever the "move left" command is executed, and an active one whenever the "move right" command is executed.

Grid Format

The no. of columns in the grid is encoded in a 16-bit word, and the no. of rows is encoded in a 32-bit word (both words precede the grid data). Each grid intersection takes up a 32-bit word. Each word contains 2 nodes, each of size 6 bits, and 5 wires, each of size 4 bits. The 5th wire connects the 2 nodes (each of the 2 nodes is in a different plane). The first set of 2 wires connects the first node with the nodes to the right and below in the grid. The second set connects the second node to its neighbors in the grid. The names (used in the pseudocode, see below) of the various bits are as follows:

Wires

  1. isConnected
  2. isActive
  3. isTrue
  4. isPosDir - right/down

Nodes

  1. isGate - logic gate
  2. isConnected
  3. isTrue
  4. isAtvClk - see below
  5. bitCount - 0, 1, or 2

The AtvClk flag is used for logic gates, which always have 2 input wires, ordered clockwise starting from the up position. This flag is true if the first input wire has received an active bit (one or zero), and is false if the second input wire has received an active bit (one or zero). The getClk function in the pseudocode returns true if the input wire is the first one (ordered clockwise starting from the up position), otherwise it is false. The code behind this function has been omitted for the sake of brevity.

Instruction Set

Each instruction in the fully compiled form of the pseudocode (see below) consists of a 4-bit op code, except for the jump instruction whose op code is followed by a 32-bit destination address.

  1. L - move tape left
  2. R - move tape right
  3. U - move tape up one grid row
  4. D - move tape down one grid row
  5. S - set bit
  6. C - clear bit
  7. N - skip jump instruction if non-zero
  8. Z - skip jump instruction if zero
  9. J - jump to 32-bit destination address

The following algorithm is the pseudocode version of the main loop, which is a string of instructions followed by the Turing machine in the master tape section. The main loop is at the very top of every universe, and is preceded by a 32-bit value which encodes the no. of 4-bit words contained in the main loop.

Algorithm

  • while true do
    • for each wire which is active do
      • node = destination node
      • if node.isGate then
        • clk = getClk(node, wire)
      • if not node.isGate then
        • node.isActive = true
        • node.isTrue = wire.isTrue
      • else if node.bitCount = 0 then
        • node.bitCount = 1
        • node.isTrue = wire.isTrue
        • node.isAtvClk = clk
      • else if clk != node.isAtvClk then
        • node.bitCount = 2
        • node.isTrue = not (node.isTrue and wire.isTrue)
      • wire.isActive = false
    • for each node do
      • if not node.isConnected then
      • else if not node.isGate then
        • if node.isActive then
          • node.isActive = false
          • for each output wire do
            • wire.isActive = true
            • wire.isTrue = node.isTrue
      • else if node.bitCount = 2 then
        • node.bitCount = 0
        • wire = output wire
        • wire.isActive = true
        • wire.isTrue = node.isTrue

Main Section

The data in the main section is a list of rows, where each row is 65,572 bits long. The maximum no. of rows = 2 ^ 65,536 (actually somewhat less than that, roughly 2 ^ 65,520). Each NAND gate in the main section (hereafter referred to as a logic gate) corresponds to one or more rows. Each of those rows corresponds to the destination address (65,536 bits long) of a logic gate receiving an output connection from the current logic gate. The destination address is preceded by a nybble (4 bits), which equals the input connection index (max 15 inputs per logic gate). The destination address and nybble of the first row of each logic gate is preceded by 16 2bits (a 2bit is a Base 4 digit consisting of 2 bits). A 2bit which has not yet received an input signal = 00. The terminating (sentinel) 2bit = 01. A 2bit which has received an input signal of 0 equals 10, and if the input signal is 1 it equals 11. The destination address and nybble of each subsequent row (not the first row of a given logic gate) is preceded by 32 bits, all zeros.

Here is the actual algorithm, which executes repeatedly, forever (this algorithm is encoded in the "RAM", or virtual memory chips located in the master tape section):

  • for all logic gates do
    • if all inputs non-zero then
      • reset all inputs to zero
      • calculate output bit
      • for all destination addresses do
        • resolve the address (temporarily go to destination)
        • set the appropriate 2bit to either 10 or 11

Multiple Universes

Each universe corresponds to a very large integer. The total no. of universes equals the set of all positive integers, which is infinite. Most of those universes aren't very interesting, since their master tape sections contain garbage data. Our particular universe just happens to contain a working master tape section, which got the ball rolling in the very beginning (the first tick of the system clock).

Digital Life

In our universe, single-celled digital life forms with self-replicating "DNA" emerged spontaneously. The environment of these life forms consists of a very large grid. Each square in that grid can contain only one life form at a time, and life forms can move from square to square. Two life forms in adjacent squares can interact. The simplest type of interaction is "eat": one life form eats an adjacent life form and ingests its nutrients. Empty squares can contain nutrients which can be eaten by life forms in adjacent squares. If a life form has enough nutrients, it can reproduce by copying itself into an adjacent square. Spontaneous mutations can occur in which the DNA is modified when copied. At some point multi-celled life forms emerged, in which multiple cells form a tree-like data structure, instead of just one cell per grid square. These life forms are bigger and more capable of eating smaller life forms. Eventually life forms became more and more elaborate, containing more and more advanced control centers, and finally became sentient. These creatures gained complete control over their grid-based environment, and developed the ability to cheat death (they became immortal). Our physical universe is just a computer simulation written by these advanced digital life forms. The no. of subatomic particles in our physical universe is somewhat less than 10 raised to the 100th power, or roughly 2 ^ 300. The total possible no. of interactions between any 2 subatomic particles equals the square of that number, or 2 ^ 600. This number is infinitesimal compared to the size of the universe inhabited by the sentient digital life forms.

This theory of mine is not inconsistent with the prevailing theory that our universe was created in the Big Bang, since it is quite possible that our Digital Creators wrote a computer simulation that encompasses the mathematical equations dreamed up by cosmologists like Stephen Hawking. The beauty of my theory is that anyone who is reasonably intelligent and persistent can master the underlying theory (logic gates, inputs and outputs, etc.) without needing a graduate degree in physics. I would even go so far as to say that my theory is consistent with all faiths, including Christianity, since the digital life forms that wrote the computer simulation we live in can conceivably take on the role of what Christians call God (or what Muslims call Allah). That God can conceivably detect living things inhabiting our computer simulation, and take care of whatever happens to us in the afterlife.

Summary

Our physical universe is really a computer simulation written by digital sentient life forms that inhabit a digital universe (essentially an amount of digital data equal to on the order of 2 ^ 65,536 bits). An infinite no. of universes exist, and each universe corresponds to a unique large positive integer. Every universe is divided into 4 sections: main loop, master tape, registers, main. (Most universes don't function since their master tape sections contain garbage data.) The master tape section consists of 2 matrices of grid intersections, and each pair of grid intersections consists of 32 bits. A grid intersection can be either a NAND gate or an intersection of 2 or 3 wires (grid lines). The first 4 grid intersections in the lower-order matrix are used to interact with the other 2 sections: registers and main. The software encoded in the "RAM" of the master tape section controls 2 tape readers, one for the registers section and one for the main section, and operates like a Turing machine. It moves the tape reader left or right, writes a zero or one, and reads the current bit. The algorithm in that software repeatedly loops through all NAND gates, or logic gates, in the main section (not to be confused with the NAND gates in the master tape section). Each logic gate consists of one or more rows (destination addresses of size 65,536 bits) and up to 15 inputs from other logic gates. For each logic gate, if all inputs have been received, then clear the inputs, calculate the output bit, and for all destination addresses, go to that address and mark that a particular input bit has been received and the value of that input bit. In a nutshell, this theory is an attempt to explain how our universe came to be, via the Big Bang, while at the same time allowing for the existence of a Creator (the digital life forms), thereby bridging the gap between religion and current cosmological scientific theory.

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