Logic Gates

Starting with M(4) = 2 ^ 16 = 65,536, each computer having a memory size of M(4) bits consists of a 3D array of wires and logic gates. Each logic gate has 2 input wires and 1 output wire. There are a total of 16 different logic gates, each corresponding to a column of 4 ones and zeros. If you write a truth table having 2 input columns, there are a total of 4 possible rows in that truth table: (0, 0), (0, 1), (1, 0), and (1, 1). The 4 bits in the output column correspond to one of the 16 possible logic gates. Here are 2 sample truth tables, corresponding to logic gates AND and OR:

A B AND  A B OR
0 0 0    0 0 0
0 1 0    0 1 1
1 0 0    1 0 1
1 1 1    1 1 1

Logic gates are the building blocks of digital computers. Many computers, including the ones discussed herein, are constructed solely out of NAND gates. A NAND gate has a truth table exactly equal to the AND gate's truth table (above left), except all bits in the output column (AND) are reversed (ones replaced with zeros and vice versa).

To read a truth table, the input columns (A, B) correspond to all 4 possible combinations of the 2 input wires, A and B. Each input wire can be either a one or a zero. The output column, which is labeled "AND" in the first sample truth table, indicates the value of the output wire. In the current clock cycle (tick of the internal computer clock that synchronizes everything), the bits in the input wires are fed into a given logic gate, and in the next clock cycle the bit in the output wire is instantaneously fed into one or more subsequent logic gates.

The M(5) computer initially contains 2 ^ 65,536 bits of information. In the beginning, when all of the M(5) computers are being fired up, all bits in every computer's initial configuration are divided into 8-bit chunks. Why 8 bits? Every M(5) computer is based on a different very large integer (up to 2 ^ 65,536 bits long). At initialization time, this integer is scanned 8 bits at a time, and 2 of those bits are discarded (in order to simplify the workings of the meta-computer, as described in a later section). The remaining 6 bits are used to specify which configurations of wires and an optional NAND gate are called for in order to generate the current grid intersection. After all grid intersections have been initialized, the current M(5) computer starts working, and the next M(5) computer starts being initialized.